00001 /* interrupts.c 00002 00003 Copyright 2008 Fred Cooke 00004 00005 This file is part of the FreeEMS project. 00006 00007 FreeEMS software is free software: you can redistribute it and/or modify 00008 it under the terms of the GNU General Public License as published by 00009 the Free Software Foundation, either version 3 of the License, or 00010 (at your option) any later version. 00011 00012 FreeEMS software is distributed in the hope that it will be useful, 00013 but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 GNU General Public License for more details. 00016 00017 You should have received a copy of the GNU General Public License 00018 along with any FreeEMS software. If not, see <http://www.gnu.org/licenses/>. 00019 00020 We ask that if you make any changes to this file you send them upstream to us at admin@diyefi.org 00021 00022 Thank you for choosing FreeEMS to run your engine! */ 00023 00024 #include "inc/freeEMS.h" 00025 #include "inc/interrupts.h" 00026 00027 /* Correctly placed in memory due to compiler/linker directives in memory.x and the linker script. */ 00028 /* This is the FULL table of length 0xFF starting at 0xFF00 and ending at 0xFFFF, redirected with */ 00029 /* jumps to the offset location by the serial monitor starting at 0xF700 and ending at 0xF800 */ 00030 /* http://m68hc11.serveftp.org/wiki/index.php/FAQ:Interrupts */ 00031 00032 const interruptTable _vectors[] VECTORS = { 00033 /* 0xFF00 to 0xFF0F */ 00034 /* The first row are NOT actually interrupts at all, just a wasted 16 bytes for tidiness */ 00035 /* UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, */ 00036 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00037 /* */ 00038 00039 /* 0xFF10 to 0xFF1F */ 00040 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00041 /* Spurious Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00042 /* */ 00043 00044 /* 0xFF20 to 0xFF2F */ 00045 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00046 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00047 /* */ 00048 00049 /* 0xFF30 to 0xFF3F */ 00050 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00051 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00052 /* */ 00053 00054 /* 0xFF40 to 0xFF4F */ 00055 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00056 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00057 /* */ 00058 00059 /* 0xFF50 to 0xFF5F */ 00060 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00061 /* Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved */ 00062 /* */ 00063 00064 /* 0xFF60 to 0xFF6F */ 00065 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00066 /* RAM violation XGATEsoft error XGATE 7 XGATE 6 XGATE 5 XGATE 4 XGATE 3 XGATE 2 */ 00067 /* */ 00068 00069 /* 0xFF70 to 0xFF7F */ 00070 UISR, UISR, StagedOffISR, StagedOnISR, IgnitionFireISR,IgnitionDwellISR,UISR, UISR,//VRegAPIISR, 00071 /* XGATE 1 XGATE 0 PIT 3 PIT 2 PIT 1 PIT 0 Reserved API */ 00072 /* Fire Coil Dwell Coil */ 00073 00074 /* 0xFF80 to 0xFF8F */ 00075 LowVoltageISR, UISR, UISR, UISR, UISR, UISR, UISR, PortPISR, 00076 /* Low Voltage IIC1 SCI5 SCI4 SCI3 SCI2 PWM ESDown Port P */ 00077 /* */ 00078 00079 /* 0xFF90 to 0xFF9F */ 00080 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00081 /* CAN4 Tx CAN4 Rx CAN4 Errors CAN4 Wakeup CAN3 Tx CAN3 Rx CAN3 Errors CAN3 Wakeup */ 00082 /* */ 00083 00084 /* 0xFFA0 to 0xFFAF */ 00085 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00086 /* CAN2 Tx CAN2 Rx CAN2 Errors CAN2 Wakeup CAN1 Tx CAN1 Rx CAN1 Errors CAN1 Wakeup */ 00087 /* */ 00088 00089 /* 0xFFB0 to 0xFFBF */ 00090 UISR, UISR, UISR, UISR, UISR, UISR, UISR, UISR, 00091 /* CAN0 Tx CAN0 Rx CAN0 Errors CAN0 Wakeup FLASH EEPROM SPI2 SPI1 */ 00092 /* */ 00093 00094 /* 0xFFC0 to 0xFFCF */ 00095 UISR, UISR, UISR, UISR, UISR, ModDownCtrISR, PortHISR, PortJISR, 00096 /* IIC0 Reserved CRG self clock CRG PLL lock PAB Overflow ModDwnCtrUF Port H Port J */ 00097 /* */ 00098 00099 /* 0xFFD0 to 0xFFDF */ 00100 UISR, UISR, UISR, SCI0ISR, UISR, UISR, UISR, TimerOverflow, 00101 /* ATD1 ATD0? SCI1 SCI0 SPI0 PAIE PAA OF ECT OF */ 00102 /* Serial 0 */ 00103 00104 /* 0xFFE0 to 0xFFEF */ 00105 Injector6ISR, Injector5ISR, Injector4ISR, Injector3ISR, Injector2ISR, Injector1ISR, SecondaryRPMISR,PrimaryRPMISR, 00106 /* ECT7 ECT6 ECT5 ECT4 ECT3 ECT2 ECT1 ECT0 */ 00107 /* Injector 6 Injector 5 Injector 4 Injector 3 Injector 2 Injector 1 Secondary RPM Primary RPM */ 00108 00109 /* 0xFFF0 to 0xFFFF */ 00110 RTIISR, IRQISR, XIRQISR, UISR, UISR, UISR, UISR, _start 00111 /* RTI IRQ XIRQ SWI UnimpInstruct COP Reset ClockReset SystemReset */ 00112 /* Entry point */ 00113 };